1/4 rev. a structure silicon monolithic integrated circuit name of product dc-ac inverter control ic type ?, ? function ?1ch control with push-pull ?lamp current and voltage sense feed back cont rol ?sequencing easily achieved with soft start control ?short circuit protection with timer latch ?under voltage lock out ?short circuit protection with over voltage ?mode-selectable the operating or stand-by mode by stand-by pi n ?synchronous operating the other BD9882F or BD9882Fv ics ?burst mode controlled by pwm and dc input absolute maximum ratingsta = 25 parameter symbol limits unit supply voltage v cc 1 5 v operating temperature range topr -40+95 storage temperature range tstg -55+125 power dissipation pd 550 *1 (BD9882F) mw 650 *2 (BD9882Fv) maximum junction temperature tjmax +125 *1 pd derate at 5.5mw/ for temperature above ta = 25 (when mount ed on a pcb 70.0mm70.0mm1.6mm) *2 pd derate at 6.5mw/ for temperature above ta = 25 (when mounted on a pcb 70.0mm70.0mm1.6mm) recommended operating condition status of this document the japanese language version of this document shall be the official specification. any translation of this document shall be for reference only. parameter symbol limits unit supply voltage vcc 5.014.0 v ct oscillation frequency f ct 20150 khz bct oscillation frequency f bct 0.100.50 khz
2/4 rev. a electric characteristicsta=25vcc=7v parameter symbol limits unit conditions min. typ. max. whole device operating current icc1 8 16 ma ct=0.5v stand-by current icc2 2 10 a over voltage detect fb over voltage detect voltage vovf 2.20 2.40 2.60 v stand-by control stand-by voltage h vsth 1.8 vcc v system stand-by voltage l vstl -0.3 0.8 v system timer latch timer latch voltage vcp 1.9 2.0 2.1 v timer latch current icp 0.5 1.0 1.5 a osc block osc constant current i ct 1.35/rt 1.5/rt 1.65/rt a osc max voltage vosch 1.8 2.0 2.2 v f ct =60khz osc min voltage voscl 0.3 0.5 0.7 v f ct =60khz max duty maxduty 44 46.5 49 % f ct =60khz soft start current iss 1.0 2.0 3.0 a is comp detect voltage visc 0.45 0.50 0.55 v ss comp detect voltage vss 2.0 2.2 2.4 v srt on resistance rsrt 200 400 uvlo block operating voltage vuvloh 4.000 4.200 4.400 v shut down voltage vuvlol 3.800 4.000 4.200 v feed back block is threshold voltage vis 1.225 1.250 1.275 v vs threshold voltage vvs 1.220 1.250 1.280 v is source current 1 iis1 1.5 a duty=2.0v is source current 2 iis2 13.0 20.0 27.0 a duty=0vis=0.5v vs source current ivs 1.0 a output block output voltage voutnh vcc-0.3 vcc-0.1 v output voltage l voutnl 0.1 0.3 v output sink resistance rsinkn 8 16 isink = 10ma output source resistance rsourcen 10 20 isource = 10ma drive output frequency fn 58.5 60.0 61.5 khz rt=18k ct=400pf burst mode bosc max voltage vburh 1.94 2.0 2.06 v f bct =0.2khz bosc min voltage vburl 0.4 0.5 0.6 v f bct =0.2khz bosc constant current iburosc 1.35/brt 1 .5/ brt 1.65/brt a bosc frequency fbosc 261 275 289 hz brt=33k bct=0.051f reg block reg output voltage vreg 3.038 3.100 3.162 v reg source current ireg 5.0 ma comp block over voltage detect vcomph 2.20 2.5 2.80 v under voltage detect vcompl 0.590 0.640 0.690 v fail pin normal output voltage vph 0.45 0.5 0.55 v protect output voltage vpl 2.9 3.1 3.3 v protect cancel voltage detect vfail 0.36 0.40 0.44 v this product is not designed for normal operation with in a ra dio active environment.
3/4 rev. a package dimensions block diagram pin descript ion pin no. pin name function 1 duty control pwm mode and burst mode 2 brt external resistor from brt to gnd for adjusting the burst triangle oscillator 3 bct external capacitor from bct to gnd for adjusting the burst triangle oscillator 4 rt external resistor from srt to rt for adjusting the triangle oscillator 5 srt external resistor from srt to rt for adjusting the triangle oscillator 6 ct external capacitor from ct to gnd for adjusting the triangle oscillator 7 gnd ground 8 fb error amplifier output 9 is error amplifier input 10 vs error amplifier input 11 stb stand-by switch 12 comp under, over voltage detect 13 reg internal regulator output 14 ss external capacitor from ss to gnd for soft start control 15 scp external capacitor from scp1 to gnd for timer latch 16 n2 fet driver 17 pgnd ground for fet drivers 18 n1 fet driver 19 fail protect clock output 20 vcc supply voltage input sop20 (unit:mm) BD9882F lot no. device mark stb block system on/off - + - + f/b block reg block - + vcc vcc uvlo pwm block logic block output block osc bosc - + protect block vs is ct ss rt brt bct duty vcc n1 n2 pgnd fail comp scp srt stb fb is vs reg gnd (include burr 12.85) ssop-b20 (unit:mm) BD9882Fv
4/4 rev. a note for use when designing the external circuit, including adequate margins for variation between external devices and the ic.use adequate margins for steady state and transient characteristics . recommended operating range the circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended operating range. the standard electrical characteristic values cannot be guaranteed at other voltages in the operating ranges, however, the variation will be small. mounting failures, such as misdirection or miscounts, may harm the device. a strong electromagnetic field may cause the ic to malfuncti on. . the gnd pin should be the location within 0.3v compared with the pgnd pin the BD9882F and BD9882Fv incorporate a built-in thermal shutdown circuit (tsd circuit). the thermal shutdown circuit (tsd circuit) is designed only to shut the ic off to prevent runaway thermal operation. it is not designed to protect the ic or guarantee its operation. do not continue to use the ic after operating this circuit or use the ic in an environment where the operation of the thermal shutdown circuit is assumed. absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become significantly shortened. moreover, the exact failure mode caused by short or open is not defined. physical countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings. about the external fet, the parasitic capacitor may cause the gate voltage to change, when the drain voltage is switching. make sure to leave adequate margin for this ic variation. on operating slow start control (ss is less than 2.2v), it does not operate timer latch. by stb voltage, BD9882F and BD9882Fv are changed to 2 state s. therefore, do n ot input stb pin voltage between one state and the other state (0.81.8v). the pin connected a connector need to connect to the resistor for electrical surge destruction. this ic is a monolithic ic which (as shown is fig-1)has p + substrate and between the various pins. a p-n junction is formed from this p layer of each pin. for example, the relation between each potential is as follows, (when gnd > pinb and gnd > pina, the p-n junction operates as a parasitic diode.) (when pinb > gnd > pina, the p-n junction operates as a parasitic transistor.) parasitic diodes can occur inevitably in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits as well as operation fau lts and physical damage. accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd (p substrate) voltage to an input pin. fig-1 simplified structure of a bipolar ic p substrate parasitic diode gnd n p p resistance transistor (npn) other adjacent components parasitic diode (pinb) (pina) p gnd p substrate gnd n n b c e n n (pina) (pinb) parasitic diode gnd gnd parasitic diode c b e
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